Final examination & D3: one day, two proofs
420-302-VA · WEEK 13 · FALL 2026

Stage 3 of 6 · The numbers · one page, the whole semester

The semester's equations

The course's mathematics fits on one page, and that is a feature: each formula earned its place by governing a real bench decision, so each comes with the decision it governed. Review them as tools, not strings: for each, know what it computes, what each symbol is, and the bench number it once produced. An equation you can apply with the kit's values is yours; one you can only recite is the exam's.

How to use this page

Three passes, in the retrieval spirit of the next page. First pass: cover the right columns, and for each formula state meaning and a worked number from memory. Second pass: cover the formula column, and reconstruct each from its meaning. Third pass, the engineer's: for each, answer "what goes wrong on the bench if I ignore this?", because that is the form exam applications take. Derivations live in the home pages linked; this page is deliberately the card, not the lecture.

Where each equation lives

The architecture strip, node, broker, rule, bridge and page, with equation tags pinned to the component each governs. On the node's circuit side: the LED current law and the voltage divider. On the ADC: counts out of 4096 and noise over root n. On the network between node and broker: the keep-alive one and a half rule. On the rule box: the PID law, the discrete integral and derivative, and the steady-state error formula. On the whole chain underneath: interfaces n times n minus one over two, and probes equal ceiling of log two of n. On the page: staleness at most publish period plus poll period. node broker rule bridge page I=(Vs−Vf)/R · divider 4096 levels · σ/√n silence > 1.5 × keepalive u = Kp·e + Ki·∫e dt + Kd·de/dt e_ss=(SP−d)/(1+K·Kp) stale ≤ Tpub + Tpoll whole chain: contracts ≤ n(n−1)/2 · probes = ⌈log₂ n⌉ every tag hangs on the component whose behaviour it predicts
Equations have addresses. Pin each formula to its component and recall gets a route: a question about a frozen dashboard walks you to the page's staleness bound; a question about a lingering offset walks you to the rule's ess. The card below is this figure, expanded.

The card: all of them

EquationSays, in one lineBench numbers, onceHome
I = (Vs − Vf) / RThe resistor sets the LED's current from what is left of the supply after the diode's drop(3.3 − 2.0) / 330 ≈ 4 mA, comfortably inside the pin budget; 220 Ω ≈ 6 mA, still safeW4
Vout = Vin · R₂ / (R₁ + R₂)The divider turns the LDR's changing resistance into a voltage the ADC can readAs the LDR's share of the total shrinks in bright light, Vout slides across the ADC's rangeW8
12-bit ADC: 4096 levelsA continuous voltage lands on one of 2¹² discrete counts; resolution is range/4096GPIO34, ADC1 (the Wi-Fi-safe bank); full range ↦ counts 0 to 4095W8
σmean = σ / √nAveraging n samples cuts random noise by √n, the cheapest filter there isread_avg with n = 16: noise ÷ 4, and the D-term downstream stops chatteringW8, W10
silence > 1.5 × keepalive ⇒ client presumed deadThe broker's death test; what makes the LWT fire and status topics honestkeepalive = 30 s ⇒ a vanished node is declared within ~45 sW9
e = SP − PVError is want minus have; the sign tells the controller which way to pushSP 60 %, PV 42 % ⇒ e = +18: push brightness upW10
u = Kp·e + Ki·∫e dt + Kd·de/dtThe PID law: react to the error, to its accumulation, and to its rateThe A2 loop; W10's chosen gains Kp 2.0, Ki 3.0, Kd 0.18 cut overshoot and settling togetherW10
Ik = Ik−1 + Ki·e·Δt · · Dk = Kd·(e − ek−1)/ΔtThe integral and derivative a loop can actually compute, one step at a timeWith the node loop's Δt ≈ 0.1 s (PERIOD_MS = 100), each step adds a sliver and compares neighboursW10
ess = (SP − d) / (1 + K·Kp)P-only control settles short by this much: gain shrinks the offset, only integral removes itW10's derivation with bench numbers; octupling Kp shrank the offset and bought oscillationW10
derivative noise ∝ 2πf · amplitudeDifferentiation amplifies fast wiggles in proportion to their frequency: the D-term's taxWhy raw ADC into Kd chatters, and read_avg's ÷4 is the first cureW10
staleness ≤ Tpub + TpollThe dashboard's number lags by at most one publish interval plus one poll interval~1 s publish + 2 s fetch ⇒ the "at most 3 s old" requirement, with the 3 defensibleW11
contracts ≤ n(n − 1)/2Pairwise interfaces grow quadratically; each used one can fail on either sideYour chain uses about six; the skeleton exercises all of them in one afternoonW12
probes = ⌈log₂ n⌉Half-splitting finds one faulty segment among n in logarithmically few looksn = 8 ⇒ 3 probes, guaranteed; one-by-one averages 4 and can cost 7W12

Symbols are half the marks

For every formula, be able to say what each symbol is and its unit, because application questions are usually symbol questions in disguise: handed a kit with Vf = 2.1 V and asked for a safe resistor, the work is identifying which symbol the 2.1 is. The Ziegler-Nichols table (0.6 Ku, 1.2 Ku/Tu, 0.075 KuTu) is the one table-shaped result; it lives with its honesty notes in Week 10.

Checklist for this stage

Check yourself

A kit arrives with 3.3 V pins, LEDs with Vf = 2.1 V, and a bag of 150 Ω resistors. Safe for a pin budgeted at 8 mA?
I = (3.3 − 2.1) / 150 = 1.2 / 150 = 8 mA: exactly at the budget, no margin for a brighter diode or a warm day. The engineering answer is therefore no, not with these; pick the next standard value up (220 Ω gives 1.2/220 ≈ 5.5 mA, comfortable). The marks here are for the symbol work, 2.1 is Vf, not Vs, and for treating "at the limit" as a design smell rather than a pass.
Averaging already costs time. Why does the card still call σ/√n the cheapest filter, and what is the price of raising n from 16 to 64 on this node?
Cheapest in hardware and code: zero components, three lines, no new theory, against which any analog filter or digital IIR is expensive to a beginner bench. The price of n is time and diminishing returns: noise falls as √n, so 16 → 64 buys ÷8 instead of ÷4 (one extra halving) while quadrupling sampling time per reading; on the node's 100 ms loop the reading burst must still fit the period, and the PV grows more sluggish, which the D-term, ironically the term you were protecting, then differentiates as lag. The card's n = 16 is the knee of that curve for this bench.
Use two different card rows to explain why the LED answers a shadow instantly while the dashboard takes seconds, with numbers.
The LED rides the fast loop: the node reads every PERIOD_MS = 100 ms step, the rule's u follows e = SP − PV within a step or two, so the action lands in tenths of a second. The pixel rides the human loop and is bounded by staleness ≤ Tpub + Tpoll ≈ 1 s + 2 s = 3 s worst case. Same shadow, two loops, two timescales, and both numbers were design choices, not accidents: the fast loop as fast as the node comfortably samples, the slow loop as slow as human attention allows.